Founding Silicon Engineer

The Mission

Zettascale Computing is building the highest-performance, most energy-efficient AI chips for artificial superintelligence to accelerate discovery and further humanity's understanding of the universe. We are a high-agency, deeply technical, and intensely mission-driven founding team. We value first principles thinking, intellectual honesty, speed, and full ownership.

The Role

Be part of a small team building Zettascale Computing's silicon efforts from FPGA prototype through tapeout and bring-up. You will set technical direction across architecture, RTL, verification, tooling, and timing closure, build the silicon team as the company grows, and partner closely with the PCB, interconnects, racks and pods, and software teams.

What You Will Build

Lead development and optimization of the FPGA prototype of our XPU
Design and review the RTL that becomes our first ASIC
Build the lint, simulation, synthesis, timing, and verification flows
Make architecture decisions across compute, memory, on-chip interconnect, and control
Drive the design to tapeout and bring-up

What You Bring

Strong digital design fundamentals, including RTL, pipelining, clocks, resets, latency, throughput, and clean microarchitecture
Hands-on FPGA experience taking real designs from RTL to a working board
Synthesizable SystemVerilog or Verilog you are proud of
Fluency with simulation, linting, synthesis, SDC constraints, timing closure, and CDC
Experience automating hardware flows with Python, Tcl, Make, Nix, or similar tools
Comfort designing compute datapaths and memory systems around bandwidth and latency
Experience with AI accelerators or low-level AI kernels
A proven autodidact

Tapeout experience, large FPGA prototypes, high-speed interface integration, formal verification, UVM, cocotb, firmware, drivers, and systems programming are strong advantages.

Expectations

This is a full-time, in-person role at our San Francisco HQ. It is not remote or hybrid
You move quickly, take broad ownership,...